Change Log

This file lists all important changes to ATS9872 Firmware

[5.02] - 2023-12-15

• Fixed potential bug that could have resulted in extraneous data being transferred due to over-commit of DMA packets.

• NPT Footers now come out uniformly in single and dual channel modes.

[4.12] - 2022-08-18

• Fixed bug where PCB revision was always being reported as '0'.

[4.11] - 2022-07-29

• Fixed bug where 100 MS/s data was corrupted. This was done by adding decimate-by-10 logic.

[4.09] - 2022-03-24

• Fixed bug that caused corrupted NPT data after 1 Gbyte boundary was crossed for record length of 12,288 or 24,576. Other record lengths were not affected.

• Also improved overall FPGA timing for acquisition datapath to allow ADCs with marginal timing to work properly on ATS9872.

[4.02] - 2021-09-29

• Added logic to acquire limited pre-trigger data in NPT mode.

[3.13] - 2021-05-14

• Improved timing of PCIe handshake signals.

[3.10] - 2021-04-13

• Initial release.