This file lists all important changes to ATS9872 Firmware
Fixed bug where PCB revision was always being reported as '0'.
Fixed bug where 100 MS/s data was corrupted. This was done by adding decimate-by-10 logic.
Fixed bug that caused corrupted NPT data after 1 Gbyte boundary was crossed for record length of 12,288 or 24,576. Other record lengths were not affected.
Also improved overall FPGA timing for acquisition datapath to allow ADCs with marginal timing to work properly on ATS9872.
Added logic to acquire limited pre-trigger data in NPT mode.
Improved timing of PCIe handshake signals.
Initial release.